Would you like to contribute your ideas to digital chip design and work with us to develop efficient low-power architectures for the next generation of RISC-V SoCs? Then have a look at our offer!
Working Student - Design of Low-Power Digital systems (all genders)
27.03.2026
Fraunhofer-Institut für Integrierte Schaltungen IIS -
Erlangen
Mikroelektronik